Volume : III, Issue : VI, June - 2014

COMPARATIVE STUDY OF AREA & POWER CONSUMPTION AMONG VARIOUS SRAMs

Neeharika, Umesh Dutta

Abstract :

SRAM is designed to provide an interface with CPU and to replace DRAMs in system that requires very low power consumption. In present scenario battery -powered hand-held multimedia system have become popular. A SRAM cell must meet the requirements for the operation in submicron/nano ranges. The scaling of CMOS technology has significant impacts on SRAM cell- random fluctuations of electrical characteristics and substantial leakage current. Consequently, the static noise margin is degraded. This paper compares the read SNM and write SNM of 6T using noise voltage concept; read power consumption of 6T, 8T, 9T and 10T SRAMs and shows the area layout comparison among them using micro-wind tool. Simulations have been carried out using Tanner Tool at 180nm technology.

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Article: Download PDF   DOI : 10.36106/ijsr  

Cite This Article:

Neeharika, Umesh Dutta COMPARATIVE STUDY OF AREA & POWER CONSUMPTION AMONG VARIOUS SRAMs International Journal of Scientific Research, Vol.III, Issue.VI June 2014

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