Volume : II, Issue : III, March - 2013

FPGA Implementation of Real Time Ethernet Communication Using RGMII Interface

C. Jithendar, Praveen Kumar Landela

Abstract :

FPGA–based solution has become more common in embedded system these days. These system need to communicate with external world .Considering high–speed and popularity of Ethernet communication, a reliable real–time Ethernet component inside FPGA is of special value. To that this end, this paper presents a new solution for 1 Gigabit Mbps FPGA–based Ethernet communications with timing analysis. The solution deals with “Reduced Gigabit Media Independent Interface” in its physical layer.UDP are a network protocol which implemented from physical to transport layer. For getting used in real–time applications, timing analysis is done in the communication system. In order to test the component inside FPGA, two different approaches are utilized. Signal measurement in combination with introduced windows based application contributes much in testing and validation phases. We propose consequences of VHDL coding styles on area utilization and speed. Optimization for maximum speed can be achieved by FSM based approach.

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Article: Download PDF   DOI : 10.36106/ijsr  

Cite This Article:

C. Jithendar, Praveen Kumar Landela FPGA Implementation of Real Time Ethernet Communication Using RGMII Interface International Journal of Scientific Research, Vol.II, Issue.III March 2013

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