Volume : II, Issue : XI, November - 2013

Logic Test of Single Cycle Access Structure

S. Ali Ahmed, Syed Jahangir Badashah, A. Farooq Hussain

Abstract :

This work proposes a new single cycle access structure for logic test. It not only eliminates the high power consumption and reduces the activity during shift and capture cycles. This leads to realistic circuit behavior during at–speed tests and stuck–at. This enables the complete test to run at higher frequencies equal or close to the functional mode. It shows that a lesser number of test cycles can be achieved by compared to other published solutions. The test cycles on a simple test pattern generator algorithm without test pattern compression is below 1 for larger designs and is independent of the design size. The structure allows additional on–chip debugging signal visibility for each register. The method is backward compatible to full scan designs and existing test pattern generators and simulators can be used with a minor enhancement. It is shown how to combine the proposed solution with built–in self test and massive parallel scan chains

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Article: Download PDF   DOI : 10.36106/ijsr  

Cite This Article:

S. Ali Ahmed, Syed Jahangir Badashah, A. Farooq Hussain / Logic Test of Single Cycle Access Structure / International Journal of Scientific Research, Vol.2, Issue.11 November 2013

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